altera小实验——SRAM读取

实验所用板子为altera DE2板子，FPGA为Cyclone II:EP2C35F672C6，quartus版本为13.0

1.实验设计

向512K SRAM中读写数据，用SW[0]为读写判定信号，SW[0] = 1（推上） -> read, 0（推下） -> write

时钟分频：50MHz ->1Hz

数据显示：读取的数据显示在7段线数字屏上

2.SRAM

SRAM读写信号（对FPGA而言）

output [17:0]SRAM_ADDR;  //2^18 == 256Kinout [15:0]SRAM_DQ;output SRAM_WE_N;  //sram write enableoutput SRAM_OE_N;  //sram output enableoutput SRAM_UB_N;  //sram Upper-byte control(IO15-IO8)output SRAM_LB_N;  //sram Lower-byte control(IO7-IO0)output SRAM_CE_N;  //sram Chip enable
容量 = 2^地址线条数 * 数据线位数 = 2^18 * 16bit = 4096Kb = 512KB，与标注一致
信号_N为低有效
3.代码
module work#(	parameter ZERO 	= 7'b1000000,	parameter ONE 	= 7'b1111001,	parameter TWO 	= 7'b0100100,	parameter THREE = 7'b0110000,	parameter FOUR 	= 7'b0011001,	parameter FIVE 	= 7'b0010010,	parameter SIX 	= 7'b0000010,	parameter SEVEN = 7'b1111000,	parameter EIGHT = 7'b0000000,	parameter NINE  = 7'b0010000,	parameter A 	= 7'b0001000,	parameter B 	= 7'b0000000,	parameter C 	= 7'b1000110,	parameter D     = 7'b1000000,	parameter E 	= 7'b0000110,	parameter F 	= 7'b0001110			)(	ClOCK_50,	KEY,	SW,	SRAM_ADDR,	SRAM_DQ,	SRAM_WE_N,	SRAM_OE_N,	SRAM_UB_N,	SRAM_LB_N,	SRAM_CE_N,	HEX4,	HEX5,	HEX6,	HEX7	);input ClOCK_50;input [3:0]KEY;input [17:0]SW;output [17:0]SRAM_ADDR;  //2^18 == 256Kinout [15:0]SRAM_DQ;output SRAM_WE_N;  //sram write enableoutput SRAM_OE_N;  //sram output enableoutput SRAM_UB_N;  //sram Upper-byte control(IO15-IO8)output SRAM_LB_N;  //sram Lower-byte control(IO7-IO0)output SRAM_CE_N;  //sram Chip enableoutput [7:0]HEX4 ,HEX5, HEX6, HEX7;/*分频*/reg [27:0]cnt; //手动分频reg clk_1Hz;   //50M -> 1Hzalways @(posedge ClOCK_50 or posedge rst) begin	if (rst) begin		// reset		cnt <= 28'b0;	end	else if (cnt == 28'd24999999) begin		cnt <= 28'b0;	end	else begin		cnt <= cnt + 1'b1;	endendalways @(posedge ClOCK_50 or posedge rst) begin	if (rst) begin		// reset		clk_1Hz <= 1'b0;	end	else if (cnt == 28'd24999999) begin		clk_1Hz <= ~clk_1Hz;	end	else begin		clk_1Hz <= clk_1Hz;	endendwire clk = clk_1Hz;wire rst = !KEY[3];/*分频结束*//*SRAM读写*/reg [7:0]write_counter;always @(posedge clk or posedge rst) begin	if (rst) begin		// reset		write_counter <= 8'b0;	end	else if (write_counter == 8'h255) begin		write_counter <= 8'b0;	end	else if (SW[0] == 1'b0) begin		write_counter <= write_counter + 1'b1;	end	else begin		write_counter <= write_counter;	endendreg [7:0]read_counter;always @(posedge clk or posedge rst) begin	if (rst) begin		// reset		read_counter <= 8'b0;	end	else if (read_counter == 8'h255) begin		read_counter <= 8'b0;	end	else if (SW[0] == 1'b1) begin		read_counter <= read_counter + 1'b1;	end	else begin		read_counter <= read_counter;	endendassign SRAM_ADDR = (SW[0] ? {10'b0,read_counter} : {10'b0, write_counter});  //地址assign SRAM_DQ 	 = (SW[0] ? 16'hzzzz : {write_counter, write_counter}); //SW = 1 -> read, 0 -> write//inout的连接方法，当需要write时，SRAM_DQ为寄存器输出；//当需要read时，SRAM_DQ赋值为高阻态，但是与SRAM输出线与，得到输出值assign SRAM_UB_N = 1'b0;assign SRAM_LB_N = 1'b0;assign SRAM_CE_N = 1'b0;assign SRAM_WE_N = (SW[0] ? 1'b1 : 1'b0);assign SRAM_OE_N = (SW[0] ? 1'b0 : 1'b1);/*SRAM读写结束*//*display in 7-segment*/reg [7:0]NUMBER [15:0];always @(posedge clk or posedge rst) begin	if (rst) begin		NUMBER[0] <= ZERO;		NUMBER[1] <= ONE;		NUMBER[2] <= TWO;		NUMBER[3] <= THREE;		NUMBER[4] <= FOUR;		NUMBER[5] <= FIVE;		NUMBER[6] <= SIX;		NUMBER[7] <= SEVEN;		NUMBER[8] <= EIGHT;		NUMBER[9] <= NINE;		NUMBER[10] <= A;		NUMBER[11] <= B;		NUMBER[12] <= C;		NUMBER[13] <= D;		NUMBER[14] <= E;		NUMBER[15] <= F;	end	else begin		NUMBER[0] <= NUMBER[0];		NUMBER[1] <= NUMBER[1];		NUMBER[2] <= NUMBER[2];		NUMBER[3] <= NUMBER[3];		NUMBER[4] <= NUMBER[4];		NUMBER[5] <= NUMBER[5];		NUMBER[6] <= NUMBER[6];		NUMBER[7] <= NUMBER[7];		NUMBER[8] <= NUMBER[8];		NUMBER[9] <= NUMBER[9];		NUMBER[10] <= NUMBER[10];		NUMBER[11] <= NUMBER[11];		NUMBER[12] <= NUMBER[12];		NUMBER[13] <= NUMBER[13];		NUMBER[14] <= NUMBER[14];		NUMBER[15] <= NUMBER[15];	endendwire [15:0]SRAM_OUT;assign SRAM_OUT = SW[0] ? SRAM_DQ : 16'b0;assign HEX7 = NUMBER[SRAM_OUT[15:12]];assign HEX6 = NUMBER[SRAM_OUT[11:8]];assign HEX5 = NUMBER[SRAM_OUT[7:4]];assign HEX4 = NUMBER[SRAM_OUT[3:0]];endmodule
4.结果
程序亲测有效，可以在7段数字屏显示读取的数字。